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Last Updated: April 11, 2026

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Last Updated: April 11, 2026

Good

4. Field programmable logic devices having any of the following: (a) A maximum number of single-ended digital input/outputs of greater than 700; or (b) An ‘aggregate one-way peak serial transceiver data rate’ of 500 Gb/s or greater; Note : This category includes — Simple Programmable Logic Devices (SPLDs); — Complex Programmable Logic Devices (CPLDs); — Field Programmable Gate Arrays (FPGAs); — Field Programmable Logic Arrays (FPLAs); — Field Programmable Interconnects (FPICs).

Code

3A001.A.

EU Code

IX.A3.005

Category

ANNEX II - Goods and technology referred to in points (a) and (c) of Article 3(1) and in Article 7

Subcategory

IX.A3.ELECTRONICS

Prohibited Supply To
KP
Authority
EU
Document

EU Regulation 2017/1509

Program information
Program information

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